IR2153D řídící obvod pro impulzní zdroje  DIP8

IR2153D řídící obvod pro impulzní zdroje DIP8

Skladová dostupnost:
1 kus


Cena bez DPH:
53,72
DPH:
21,00%
Cena s DPH:
65,00 Kč

Množství:

SELF-OSCILLATING HALF-BRIDGE DRIVER, 10..15,6V, DIP8
Napájení: 10..15,6V
T oper. -40..125 °C
Pouzdro: DIP8 LIN-IC MOSFET/IGBT budič polomost, vlastní osc. / 600V, DIP8
Features
• Integrated 600V half-bridge gate driver
• 15.6V zener clamp on Vcc
• True micropower start up
• Tighter initial deadtime control
• Low temperature coefficient deadtime
• Shutdown feature (1/6th Vcc) on CT pin
• Increased undervoltage lockout Hysteresis (1V)
• Lower power level-shifting circuit
• Constant LO, HO pulse widths at startup
• Lower di/dt gate driver for better noise immunity
• Low side output in phase with RT
• Internal 50nsec (typ.) bootstrap diode (IR2153D)
• Excellent latch immunity on all inputs and outputs
• ESD protection on all leads
• Also available LEAD-FREE
Preliminary Data Sheet No. PD60062 revM
SELF-OSCILLATING HALF-BRIDGE DRIVER
Product Summary
VOFFSET 600V max.
Duty Cycle 50%
Tr/Tp 80/40ns
Vclamp 15.6V
Deadtime (typ.) 1.2 μs
Typical Connections
COM
600V
MAX
Shutdown
IR2153(S) IR2153D
VBCOM
600V MAX
Shutdown
IR2153(D)(S) &(PbF)
Description
The IR2153D(S) are an improved version of the
popular IR2155 and IR2151 gate driver ICs, and incorporates
a high voltage half-bridge gate driver with a front end oscillator similar to the industry standard CMOS
555 timer. The IR2153 provides more functionality and is easier to use than previous ICs. A shutdown feature
has been designed into the CT pin, so that both gate driver outputs can be disabled using a low voltage control
signal. In addition, the gate driver output pulse widths are the same once the rising undervoltage lockout
threshold on VCC has been reached, resulting in a more stable profile of frequency vs time at startup.
Noise immunity has been improved significantly, both by lowering the peak di/dt of the gate drivers, and by
increasing the undervoltage lockout hysteresis to 1V. Finally, special attention has been payed to maximizing
the latch immunity of the device, and

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